Teledyne LeCroy announced the DDR5 Debug Toolkit for SDA 8 Zi-B and LabMaster 10Zi-A oscilloscopes.

The DDR/LPDDR5 JEDEC specifications JESD79-5/ JESD209-5A feature faster rates of up to 6400 Mb/s. As DDR5 & LPDDR5 controllers make their way into embedded systems with faster DRAM, the task of design validation and debug becomes even more challenging for DDR validation Engineers.    

This DDR Debug Toolkit now supports DDR5 /LPDDR5 for test, analysis and debug of the entire DDR design cycle:

• Automatic Read/Write burst separation
• Bursted data jitter analysis
• Eye diagram mask tests
• DDR-specific measurement parameters
• Seamless integration with the HDA-125 High-Speed Digital Analyzer for command bus analysis

Pricing and Availability

Product information can be found here: https://teledynelecroy.com/ddr/.

Datasheet: http://cdn.teledynelecroy.com/files/pdf/ddr-debug-toolkit-datasheet.pdf.