The most insidious of discontinuities has emerged to be the ¼-wavelength via stub. This tiny artifact has the potential to make your signal completely disappear or, more accurately, cancel itself out. As such, an industry that hardly ever retools (PCB fabrication, as compared to IC fabrication) has learned to “backdrill” vias to remove problematic via stubs. But the retooling needs to continue. So before we dismiss the stub problem as resolved, it’s important to understand that increasing data rates have turned previously benign PCB features into stubs – particularly above 30 Gbps. I’ll discuss those in a moment, but first let’s understand how stubs affect signal integrity (SI).

Understanding Stubs

A couple decades ago Eric Bogatin introduced the helpful rule of thumb that predicts the ¼-wavelength PCB stub lengths in inches to be 3/Gbps ([1] slide 5). For example, a one-inch stub creates a problem for a 3 Gbps signal. While we began discussing the via stub problem at 6 Gbps, a few years later vias in 0.250” thick 12 Gbps backplanes became acutely problematic (3/12 = 0.250”) and back-drilling became imperative. As such, Eric encouraged everyone to play it 10x safe, and keep stubs smaller than 0.3/Gbps. And that is pretty much what happened.  The good news is that back-drilling is now commonplace, and hence affordable and reliable.

Figure 1 illustrates the difference between the presence of a ¼-wavelength via stub and a stub that is 10x-shorter, in both differential insertion loss (IL, left) and resulting eye diagrams (right). The plots compare a 12” 12 Gbps channel that includes either a 0.250” stub (3/12, red) or a 0.025” stub (0.3/12, green). As shown, the difference is stunning. While the channel with the shorter stub (green) has a substantial eye opening (upper eye), when the stub lengthens to the critical distance (red) the eye disappears (lower eye).  The longer stub causes no eye opening because, as the IL plot (red) reveals, less than 2% of a 6 GHz (12 Gbps) signal arrives at the Rx.  In contrast, there is no observable change in loss due to the presence of the shorter stub (green).  As predicted by the rule of thumb, the 0.250” stub causes the greatest attenuation (loss) at 6 GHz. Yet note that nearby frequencies see substantial loss as well. For example, at 5 GHz (10 Gbps signal) the loss on the red curve is 2x that of the green. In fact, the loss plots do not become similar until ~600 MHz – which is another expression of the 10x rule. As such, you can also think of 0.3/Gbps as the stub length that does not appreciably affect IL.

Figure 1. 12 Gbps channel with 0.25” stub or 0.025” stub (plots created in MATLAB and Signal Integrity Toolbox)

Why does the signal disappear? Picture a sinewave splitting in half at the junction where the channel encounters the stub. Half of the signal proceeds down the ¼-wavelength stub until it reaches the end where it is 90° out of phase. At the end of the stub, it finds an open circuit causing 100% of the signal to reflect back toward the junction. When the signal arrives back at the stub junction it is 180° out of phase, canceling out the other half of the sinewave on its way to the Rx ([1] slide 5).  As such, we see only the lower-frequency components of the signal at the Rx, which looks like noise with no observable 6 GHz eye (Figure 1, lower eye). 

Given such predictable signaling physics, it should be clear you can change the X axes in Figure 1 to reflect any data rate. Or try this exercise on your data rate using this free trial of Signal Integrity Toolbox. You may be surprised to discover that acceptable stub lengths are now in the 10 mil range (=0.3/30 Gbps). What?! If you pause and think about that, it becomes apparent that numerous features are now stubs.

Stubs Aren’t Only in Vias

Vias are not the only cause of stubs.  In the early days of serial implementation, some inadvertently caused problematic stubs by adding things like testpoints, ESD devices, or other features to the routes. We learned serial links must be point-to-point, meaning they connect to only one Tx and one Rx, so don’t add anything else. While extraneous items are now eliminated, higher data rates have brought the next wave of stubs that must be avoided.

Figure 2 shows features that behave as stubs (red rectangles) as data rates increase. Although the top item (a back-drilled via) is understood, most are not accustomed to thinking of the other features shown as stubs. The second item illustrates that signals must route into connector pads at the end opposite the connector solder leg exit. Failing to get this correct significantly increases 30+ Gbps bit error rates (BER) [2]. Said another way, if you route from the back side of the connector pad (from the right side of the second item in Figure 2), the signal will split between the connector leg and the ~50 mil “stub” which is the connector pad. And 50 mils is too long for even an 8 Gbps stub.

Figure 2. Hidden “stubs” (red rectangles), and how to remove them

The lower two items in Figure 2 (edge-finger connector wipes and press-fit pins) are largely the responsibility of the connector vendor and industry specification to resolve, respectively. Because this is not happening in many situations, it’s imperative for hardware engineers to understand and remove this new wave of stubs from designs. Nevertheless, the press-fit pin example illustrates why 25+ Gbps serial standards now require surface mount connectors – increasing the occurrence of the second item.

Planning Ahead

When starting a new design, it is helpful to juxtapose the data rate onto anticipated physical features [3] – particularly in relation to relevant feature size (RFS, [4]) and stubs. In particular, it’s important to resolve via stub strategies as part of layout planning and stackup design.

While back-drilling is the most common way to remove via stubs, other methods can be used.  Those implementing just a few not-so-high-speed serial links can solve the problem by keeping signals on outer (or near-outer) layers of the PCB.  For example, if you break out of a BGA on the top layer of a 16-layer PCB and via down to layer 15, the resulting stub is likely too small to be of concern.  Solve the resulting stub length and check it against the 0.3/Gbps rule of thumb. Should you choose not to backdrill a via to your lowest signal layer, Figure 3 demonstrates the resulting via’s “stub” is comprised of not only the via barrel but also the pads required to get to the end of the signal path. This can easily make this type of stub too long at 30+ Gbps (e.g., stub is 11 mils = 4 mils for pad ring + 3 mils for dielectric layer + 4 mils for bottom pad ring). Because high-speed signals travel on the outside of conductors, add in the length of the middle pad ring even on a back-drilled via.

Figure 3. Stub lengths include pads, if not removed

Others choose sequential lamination to limit via lengths and their stubs to a smaller section of the board’s stackup.  Still others use blind and/or buried vias to remove or minimize stub lengths. However you handle it, you need to think about structures in a design three dimensionally to ensure all stubs are managed in your layout. Again, it is helpful to determine your strategy for dealing with stubs before your stackup and signal layers are defined.

In Conclusion

This article applies Eric Bogatin’s 0.3/Gbps rule of thumb to identify and prevent signal degradation due to stubs. As data rates increase, a new wave of stubs is emerging to understand and manage. Indeed, relevant stub lengths are now on par with trace widths.

Unfortunately, higher data rate standards continue to specify mechanical dimensions that create stubs and hence cause SI problems. As such, let’s work together to help the industry understand how and why increasing the data rate exacerbates the stub problem. I trust this article will be helpful to that end, so please share it.

References

[1] Telian D. (2007). Adapting Signal Integrity Tools and Techniques for 6 Gbps and Beyond [slides 1-33]. SiGuys, CDNLive! 2007.
[2] Telian D., Rowett K., Teplitsky I., 2023. ‘PCIe Gen5 Signal Integrity Implementation – Issues & Solutions.’ DesignCon 2023 Technical Paper.
[3] Telian D. (2022 October 5). ‘Signal Integrity Cheat Sheet – Data-Rate Driven Design Decisions.’ EDIcon 2022.
[4] Telian D. (2022 April 1). ‘Which Discontinuities are Small Enough to Ignore?’ Signal Integrity Journal RSS.

This article is an excerpt from Donald Telian’s new book Signal Integrity, In Practice. A Practical Handbook for Hardware, SI, FPGA, and Layout Engineers.