Anritsu Company (booth #741), a Diamond Sponsor of DesignCon 2018, will host a series of technical sessions and conduct live testing demonstrations that aid engineers in verifying emerging and next-generation high-speed designs during DesignCon 2018, to be held in Santa Clara, CA, January 30 – February 1, 2018. Among the technologies to be addressed by Anritsu will be PCI Express® (PCIe®), Thunderbolt, USB 3.0, 200G/400G PAM4, and 56G PAM4.

Anritsu continues to be at the forefront of high-speed designs, offering a portfolio of test solutions used by engineers to verify leading-edge components, devices, and systems. Among the products on display at DesignCon 2018 will be the Signal Quality Analyzer-R (SQA-R) MP1900A BERT, VectorStar® and ShockLine™ vector network analyzers (VNAs), BERTWave™ MP2100A, and Network Master Pro™ MT1000A. The live demonstrations featuring these solutions will be held in the Anritsu booth throughout the show. Technical sessions will be conducted on Thursday, February 1 in the Great America Meeting Room 2.

PAM4 Testing – On Thursday, February 1 at 10:15 a.m., Hiroshi Goto, Anritsu Company Business Development Manager, will lead a presentation on BER solutions that can conduct 200G/400G PAM4 tests in accordance with IEEE 802.3, InfiniBand Trade Association (IBTA), and Optical Internetworking Forum (OIF) Common Electrical Interface (CEI) standards. Additionally, live demonstrations of a 200G/400G PAM4 solution featuring the MP1900A BERT and MP2100A, along with the 32 Gbaud Power PAM4 Converter G0375A and 32 Gbaud PAM4 Decoder with CTLE G0376A, will be performed throughout the show.

Anritsu will also host a 56G PAM4 BER live demonstration on February 1. The presentation, given by Anritsu Field Applications Engineer James Morgante, will be held at 11:05 a.m.

High-speed Serial Bus Receiver Verification – Two presentations on high-speed serial bus testing will be held Thursday, February 1. The first, scheduled to begin at 2:00 p.m., will be conducted by Patrick Connally, Technical Marketing Engineer at Teledyne LeCroy, and focus on PHY layer test requirements and procedures for PCIe Gen3, Gen4, and Gen5. Immediately following will be a session on testing PCIe Gen4, Thunderbolt, and USB 3.0 interconnects given by Mike Engbretson, Chief Technology Engineer at Granite River Labs.

Supporting the technical sessions will be demonstrations in the Anritsu booth. One will feature the MP1900A BERT and Teledyne LeCroy SDA830Zi-B Serial Data Analyzer, while the other will integrate the MP1900A with a real-time oscilloscope and Granite River Labs software.

Signal Integrity Solutions
The MP1900A will be part of a 100G Active Optical Cable (AOC) demonstration in the Anritsu booth. Also featured in the demonstration will be the BERTWave MP2100A and Network Master Pro MT1000A.

Anritsu’s VNA signal integrity solutions will be shown at DesignCon 2018, as well. The VectorStar MS4647B 4-port instrument will be the centerpiece of a 70 GHz VNA solution, and ShockLine RF and Microwave VNAs will be featured in a 43.5 GHz 4-port solution, as well as an automated VNA signal integrity compliance system.