Articles by Steve Sandler, Picotest

In this article, Steve Sander presents three viable solutions for measuring ultra-low impedance with a maximum of 10 ms, each of which can be performed using sophisticated and novel FFT based 3-port measurement. These methods involve applying digitally modulated patterns to create modulated load currents up to 1500 A and recording the resulting power rail voltage perturbations. 

EM simulators that are optimized for PCB PDN simulations provide an increased level of automation to enable the basics of DC IR Drop, electrothermal, and AC impedance for early detection of design issues. In this article, Heidi Barnes, Steve Sandler, and Benjamin Dannan examine why the ability to optimize a PDN for Z_Target with PCB parasitics in the frequency domain and then export to an end-to-end PI Digital Twin simulation for validation in the time domain should be standard practice for the PI engineer.