Eric Bogatin, Signal Integrity Journal Technical Editor

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In our first electrical engineering class, we learn that the voltage across an inductor is L di/dt. We are ingrained with the idea that the voltage across an inductor is generated by the changing current through it. Not so, says Larry Smith, industry Power Integrity expert from Qualcomm and member of the SIJ EAB.

I’ve been attending and presenting at DesignCon for 28 years since the first HP High Speed Digital Symposium. And every year, it’s been the same thing, overloaded with too many great talks, too many companies’ latest products to see and too many online friends to finally meet in person. The only thing that has changed is the “too many” part. Needless to say, the many part has only increased.

A Unique Hands-on Opportunity to Characterize Interconnects to 50 GHz, sponsored by the IEEE P370 Standards group and Samtec.

We’ve come to the end of our first complete year of online publication. Our Editorial Advisory Board (EAB) has done a superb job of nudging us in the right direction, contributing high value technical pieces and reviewing all the technical content submitted to the Signal Integrity Journal. As a final passing favor to the SI, PI and EMC community of readers, we want to leave all of our readers with a year-end holiday gift.

Not an official award, per se, but Eric Bogatin gives his top pick for his favorite demo at the recent EMC event in Washington DC.

Traditional swept-tuned EMI spectrum analyzers and step-tuned EMI receivers may produce misleading or entirely false measurement results when the signal under study is not steady state, but transient. See Eric Bogatin's review of a demo by Lee Hill on this subject.

Ground is NOT a current return path. Read on to see Todd Hubing’s four rules of effective grounding strategy.

Read Eric’s suggestions on measured voltage noise and download a free sample of Eric and Larry’s new PDN Design book.

Read on to see how to determine if you should you use a differential pair in your test coupon and pay for a 4-port measurement, or use a single-ended test line and only pay for a 2-port measurement.

Holey Swiss cheese offers a popular metaphor for describing planes with a high density of clearance holes, usually under a BGA escape. The concern of many designers is the impact on the inductance in the power and ground planes due to all those holes. Since the gaps between them is narrow, won’t they constrict the current, dramatically increasing the series resistance and the loop inductance of the planes?