Expert Advice on Power Integrity
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The articles and columns contained in this section come from members of the Signal Integrity Journal’s Editorial Advisory Board (EAB). Members of the EAB review every technical article posted on the site, and are often sought after for their advice. In this column area, the EAB will talk about issues related to power integrity.

Power Integrity

Istvan is a Principle Signal and Power Integrity Engineer at Samtec, working on advanced signal and power integrity designs. Prior to 2018 he was a Distinguished Engineer at SUN Microsystems, later Oracle. He worked on new advanced power distribution design and validation methodologies. He was responsible for the power distribution and high-speed signal integrity designs of SUN's successful workgroup server families. He introduced the industry's first 25 um power-ground laminates for large rigid computer boards, and worked with component vendors to create a series of low-inductance and controlled-ESR bypass capacitors. He also served as SUN's representative on the Copper Cable and Connector Workgroup of InfiniBand, and was engaged in the methodologies, designs and characterization of power-distribution networks from silicon to DC-DC converters. He is a Life Fellow of the IEEE with twenty five patents to his name, author of two books on power integrity, teaches signal and power integrity courses, and maintains an SI/PI website.

Making a Steamy, Hairy Golf Ball

July 19, 2019

Istvan Novak

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In his interesting article,¹ my friend Steve Sandler pointed out a major hurdle we face in power distribution design: power engineers (who design power converters) and power integrity engineers (who design system bypassing-decoupling networks) use different vocabulary, techniques, and requirements. To understand a little better how we got here, I want to start with a prediction I heard sometime in the early 90s at one of the conference keynote speeches: “In 10 to 20 years, computers will look like hairy steamy golf balls.” The argument was that the many different IO cables—remember parallel printer cables?—will make computers look hairy, and because they will be much smaller, probably the size of a golf ball, they will dissipate more power and will be steaming hot. Almost 30 years later, it is time to ask: Are we there yet?

Going back a few more decades, Figure 1 shows a computer board made of germanium diodes and transistors.

Figure 1. A DTL (Diode-Transistor-Logic) from the early days of computers. Notice that there is no power distribution component whatsoever on the board.

This computer board was working fine with no bypassing or decoupling component on the board. There was a central power supply and a few bulk capacitors in the chassis, that was all about power distribution. In contrast, today the power-hungry big chips need hundreds of power distribution components to feed them, and those components fight for the same prime space around the chips that critical signal integrity and thermal solutions also want to occupy. Figure 2 shows a small personal computer motherboard from recent years.

Figure 2. Partial top view of a Gigabyte H110M-A motherboard

Practically all of the components you see around the CPU are serving various power distribution purposes. What makes power distribution design really challenging today is illustrated by the pyramid of requirements shown in Figure 3. On the top, we have the system functionality requirements. The customer ultimately cares for the system functionality, availability, and reliability (along with cost, of course), and therefore this is the level where the system designer and manufacturer have many detailed specifications and requirements to adhere. These requirements may be challenging and may be hard to achieve, nevertheless they provide guidance for the design and validation.

Figure 3. Pyramid of various requirements for a system

Also, determining whether the system meets the requirements is (relatively) simple and straightforward. This all changes, however, as we go down in the pyramid to look at the supporting functions.

For high-speed computing and communications boxes, signal integrity is unquestionably a fundamentally important support function. Signal integrity guarantees that the bits get transferred with no or just with a sufficiently few errors.

Gradually over the decades, industry-wide standards, best practices and procedures have been developed to help with signal integrity design, bring up, and validation. For instance, there are electrical requirements spelled out in the physical layer section of all signaling standards. These requirements have come a long way: first we had only bit error rate requirements, later various masks came along, and today we have effective return loss (ERL) and channel operating margin (COM) helping the design and validation. Test instruments and simulation software alike incorporate these requirements to help our test and validation. Also, several signaling standards offer a fail-safe fallback: if the high-speed link does not come up or stops working at the maximum speed, it scales back the data rate until at least some functionality is restored. So my point is that in signal integrity, today, there are many specifications, requirements, and standards providing guidance and setting design goals.

The availability of support and guidance changes dramatically as we move further down on the pyramid. I show power integrity at the bottom of this pyramid, for two reasons. First, power integrity is really the necessary foundation for the layers above, for signal integrity and system functionality. If power distribution does not work properly, signal integrity and system functionality may become totally irrelevant— because the system will not work. Second, for power integrity designs and validation there are no industry standards, and often even the specifications and requirements are awfully incomplete. Along the power distribution design process, a lot of the requirements are left to the designer to establish, what makes the design and validation processes a little bit ill-defined and very challenging.

As we circle back to the prediction that was made in the 90s: you can imagine how the power distribution looks like for power-hungry chips requiring DC-DC converters with up to 1000 A of maximum current?² Though a few years late compared to the prediction, large switch chips handling many terabytes of traffic soon very well may look like hairy, steamy golf balls.

And now if we finally return to the challenge pointed out in:¹ why power engineers and power-integrity engineers still have differing vocabulary and different approaches to the same common problem? Figure 4 will help us to explain.

Figure 4. Block diagram of a switching voltage regulator

The blue blocks in the figure represent the main subsystems of a switching regulator: this is the territory of the power engineer. The gray block (the territory of the power integrity engineer) represents the circuit in the user’s system: bypass capacitors, optional filters, and eventually the load(s) we need to feed. These blocks are connected together at the converter output. The output voltage is regulated by a feedback loop and the sense point of the feedback circuit has to monitor the same output where the converter circuit and the user load connect. This means that from a feedback-loop stability point of view the voltage regulator circuit and the user load are inseparably linked together and ultimately the stability can be evaluated only if we know all of these blocks.

When we design a DC-DC converter for a given, known load, we can do the power and power integrity designs in close collaboration or doing both by the same people. But when power engineers design voltage regulators for the open market, how could they know the user requirements and user circuits? Of course, they do not. Also, for reasons of economy, voltage regulators tend to have wide input and output voltage ranges, further increasing the vast number of possible user applications. All of the above left the power engineers with little choice, but to focus on the regulator itself and isolate it as much from the load as possible. During the early decades of switching regulators, this resulted in limited loop bandwidth and a substantial bank of output capacitors, such that the impact of adding the unknown user circuit was minimized.

The DC-DC converter shown in Figure 5 is a 20-year old design and supplied a maximum of 16 A. The useful area of the converter board (without the edge fingers) is 1.25 in. × 3.5 in. Next to the output connections we see 16 large ceramic capacitors. These capacitors, together with the series inductance of the card-edge connection provided substantial isolation from the unknown load impedance. In those days, the fact that power engineers and power-integrity engineers spoke different languages, did not create a significant problem yet. Today, as a result of improved technology and ongoing cost reduction, a dual 9 A (or single 18 A) fully encapsulated DC-DC converter module has a single 2.2 uF capacitor on each of its outputs and comes in a 0.63 in. × 0.5 in. BGA package.³ The BGA package provides low connection impedance, but also less series isolation. Similarly, the single ceramic capacitor on the output means that to analyze the stability of the feedback loop, we can no longer ignore the interaction between the power converter output stage and the load circuit. It is now time to unify the vocabulary and design/validation processes of the power and power integrity engineers.

Figure 5. A Lucent Technologies 16 A DC-DC converter

At the end you may ask how all this relates to the hairy and steamy golf ball? Well, the same underlying trend of miniaturization, which pushes the power density to the boiling point, removes the isolations and barriers among previously separate system domains, forcing us to rethink how we design power converters and system power distribution.

Article was published in the SIJ July 2019 Print Issue, Reflections: Page 16.