Title: EDI CON Online DAY 3 KEYNOTE: 56G/112 Gbps From Front-Panel to the Backplane

Date: September 12, 2019

Time: 7am PT / 10am ET

Sponsored by: Samtec

Presented by: Jignesh Shah, Sr. Technologist, Samtec Inc.

Abstract:
As data rate requirements approach and surpass 56/112 Gbps PAM4, developers are challenged with balancing increasing throughput, scalability and density demands with concerns such as power consumption, signal integrity, cost and time-to-market. In this keynote, Samtec will demonstrate real-world applications in high-performance interconnect design, channel optimization, and alternate system architectures that exceed the demands of next generation data transmission.

Presenter Bio:
At Samtec, Jignesh Shah is responsible for defining product architecture and early customer engagement for their next generation high speed connectivity products. He has over 20 years of experience with Finisar and Sumitomo Electric where he was responsible for defining the optical, mechanical and thermal product design and architecture. Jignesh and Samtec have been heavily involved in driving the various standards and new architectures that have been enabled by their commitment to innovation and understanding of industry demands. He holds multiple patents that are pertinent to the high speed connectivity industry, and has completed his education and research at IIT Mumbai and the University of Texas at Austin.

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