Signal Integrity Journal Webinar Series
Title: Accurate and Smart Crosstalk Analysis for Memory Systems
Date: October 29, 2024
Time: 8am PT / 11am ET
Sponsored by: Keysight Technologies
Presented by: HeeSoo Lee, High-Speed Digital Segment Lead for EDA Software, Keysight Design Engineering Software Division
Abstract:
Crosstalk poses a critical challenge to the performance of high-speed memory systems (source synchronous clock systems), leading to issues such as data corruption, increased error rates, performance degradation, and elevated design costs. Identifying and addressing these impacts early in the design phase—before tape-out or prototyping—is essential for achieving design success. However, accurately and systematically performing crosstalk analysis is complex and requires significant effort to automate the process effectively.
In this webinar, we will explore the nature of crosstalk and introduce a cutting-edge approach to high-fidelity crosstalk analysis in high-end memory systems. We will also cover advancements in automated crosstalk analysis report generation, demonstrating how these innovations streamline the process and enhance design reliability. Join us to gain insights into advanced techniques that can safeguard your designs and optimize performance.
Presenter Bio:
HeeSoo Lee is the High-Speed Digital Segment Lead for EDA Software of Keysight Design Engineering Software division, located in Santa Rosa, California, USA. He has held several positions in Keysight, Agilent Technologies, and Hewlett-Packard, including consulting business manager, technical marketing lead, and field applications engineer since 1989. Before, he worked for Daeryung Ind. Inc. as an RF/MW circuit design engineer. He has over 30 years of design and simulation experience in RF, microwave, and high-speed digital designs. He graduated with a BSEE from Hankuk Aviation University, South Korea.
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