Items Tagged with 'EDA'

Keysight introduces PCIe Designer, a new product in the ADS product suite that supports simulation workflows based on industry standards for high-speed, high-frequency digital designs.

Since woven glass PCB substrates are anisotropic, EDA design and modeling software hoping to advance AI and ML algorithms should have provisions to model anisotropic material, especially via transitions. In this article, Bert Simonovich discusses the importance of having an awareness of the test method used by CCL suppliers for accurate modeling and simulation. Simonovich covers how the use of out-of-plane Dk_z values instead of in-plane Dk_xy values for via modeling can cause misleading simulation results, which may result in reduced margins and potential compliance test failures when the design is built and tested. 

Keysight Technologies, Inc. introduces Chiplet PHY Designer, the latest member in its family of high speed digital design and simulation tools that provides die-to-die interconnect simulation, which is a key step in verifying performance for heterogeneous and 3D integrated circuit designs commonly referred to as chiplets.

Brought together through a shared commitment to online engineering education and success, the two companies have partnered to develop a four-episode podcast series entitled "From Frustration to Elation." 

Keysight Technologies, Inc. announced it has acquired Cliosoft and will be adding the company's line of hardware design data and IP management software tools to its portfolio of EDA solutions.

One of the main challenges of performing analysis upstream is incomplete models used in analysis. Normally the full physical layouts from which extractions are performed on interconnect do not yet exist. So how does one fill in the blanks to perform early analysis?

Eagerly anticipated, the next generation of DRAM technologies (DDR5/LPDDR5) are presently being validated in the lab by leading silicon vendors worldwide. This latest generation has a big surprise in store for hardware engineers and SI specialists that need to simulate such systems. DDR5 will introduce decision feedback equalization (DFE) for the DRAM receiver for the very first time.

SIJ talked with Dave Kohlmeier about industry trends, how to foster innovation, and what today’s EDA customers need most.