Items Tagged with 'Frequency'

Pendulum Instruments has announced the new CNT-102 dual-channel frequency analyzer.

Researchers have succeeded for the first time worldwide in generating and detecting photons with stable photon frequencies emitted from nitrogen-vacancy defect centers in diamond nanostructures.

In this edition of Practical EMC, Ken Wyatt walks you through different spectrum analyzers and his experience with them, helping you to pick the one best suited to your needs. 

SIJ technical editor Eric Bogatin notes that there are some problems that occur over and over again across product families and applications. They have a handful of essential principles at their underlying root cause. In this blog, he explains that if we really understand these underlying principles, the root cause of the problems will be more apparent and their solutions closer to implement.

 “A few minutes upfront checking will save you hours of frustration later,” Eric Bogatin explains seven features of s-parameters

PCIe Gen4 enables new wave of innovation to guide inner-loop SerDes optimization assisted by outer-loop system optimization. This paper introduces an outer-layer equalization scheme for managing SerDes inner-layer equalization to optimize overall system-level aggregate performance.

In the GB/s regime, accurate modeling of insertion loss and phase delay is a precursor to successful high-speed serial link designs. We propose a causal (physically meaningful) form of the Hammerstad and Cannonball-Huray metal roughness frequency dependent complex correction factor. Compared to the widely used, non-causal form, it considerably increases the inductive component of internal metal impedance. Transmission lines simulated with a causal version demonstrate increased phase delay and characteristic impedance. By obtaining the dielectric and roughness parameters solely from manufacturers' data sheets, we validate the model through a detailed case study to test its accuracy.

Here’s a look at how phase noise converts to time-interval error jitter, which is particularly important to those working on reference clocks for high-speed SERDES or sampling clocks. Read on to see how this can help debug systems to reduce sources of timing noise.