Signal Integrity

200+ Gbps Ethernet Forward Error Correction (FEC) Analysis Cover 9-3-24.jpg

200+ Gbps Ethernet Forward Error Correction (FEC) Analysis

DesignCon 2024 Best Paper Award Winner

In order to study what is needed and what has been adopted for the next Ethernet speed node of 200 Gbps per lane, this DesignCon 2024 paper, a recipient of the Best Paper Award, investigates different FEC schemes such as end-end, concatenated, and segmented FECs, examining how these different FEC schemes affect signal integrity and performance in different end applications. 


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