We use cookies to provide you with a better experience. By continuing to browse the site you are agreeing to our use of cookies in accordance with our Cookie Policy.
Jayaprakash Balachandran (JP) is with Unified Compute Server (UCS) Group at Cisco, Inc as a Senior Technical Leader. In this role, he is involved in architecting next generation compute server interconnects and Signal-Power integrity design of advanced ASIC packages and PCBs used in data centers. JP also leads OCP/ODSA Chiplet interoperability work stream. He has over 16 years of experience in high-speed design and has a PhD from KUL/IMEC Belgium.