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Abenezer Argaw is a senor in the ECEE dept of University of Colorado, Boulder. He is seeking an education and career within the field of embedded systems.
The first goal in any high-speed board stack up design is to engineer interconnects with a target impedance, and the first step in this process is to use a 2D field solver to explore design space with a virtual prototype. Just how well can a field solver predict the impedance of traces on a real board? This article aims to answer this question.
