Items Tagged with 'DDR'

Due to the ever increasing speed-grade of memory systems, it is necessary to apply equalizations, which creates severe burdens for memory system design engineers. Fortunately, the challenges have been overcome by an IBIS-AMI solution for single-ended signals and the introduction of a forwarded clocking solution. Read on to learn more.

We want to follow this mantra of 85 ohms for PCIe, but it may not be so easy. Here’s a look at exactly what the spec says, and what we can do about it.

Check out this article from Mike Hertz that details specifically how The Track measurement operator on oscilloscopes can be used to identify timing issues.

Many claim that for stripline, it is ok to cross a split power plane, so long as the other adjacent reference plane is solid. Some others claim if there is an adjacent solid reference plane, less than 5mils away under the split, crosstalk will be mitigated. Read on to see an investigation into what really happens when stripline signals cross split power planes.