Signal Integrity

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SIPro uses an innovative new composite EM-technology that delivers high-frequency accuracy, together with the speed and capacity required for densely-routed cutting-edge PCB design. The PIPro solution is a collection of three PI-specific simulation engines for DC IR drop, AC power delivery network (PDN) impedance, and power plane resonances analysis.

This paper will present correlation data to validate the software and hardware tools necessary for fast-track deployment in upcoming PAM-4 applications.

In this paper we report results of IBIS-AMI based link analyses of realistic 56G PAM4 channels. Systems under investigation are represented by channel S-parameters and SerDes AMI models that capture actual chip designs, including impedance, equalizations and embedded tuning.

A quick overview of how to download and use Signal Integrity Design Using Keysight Advanced Design System (ADS) including examples.

Keysight ADS 2016 features a host of new, technologies designed to improve productivity, including two electromagnetic (EM) software solutions specifically created to help signal and power integrity engineers improve high-speed link performance in PCB designs. What follows is a listing of 8 ways in which ADS 2016 can help you, the engineer, overcome your signal and power integrity challenges.

In the beginning there was transient simulation. Ensuring functional chip-to-chip links in a system meant performing a time-domain simulation with a SPICE simulator. The result was a time-domain waveform that was evaluated during post processing for signal integrity (SI). The main task was to measure the eye diagram, usually assuming a perfect clock as the phase reference. Due to rising signaling speeds and decreasing timing margins, the task was made more challenging when it became necessary to account for other effects.

Models of transmission lines and transitions accurate over 5-6 frequency decades are required to simulate interconnects for serial data channels operating at 10-100 Gbps. Extremely broadband modeling of conductor properties for such high-speed channels is a challenging task. This paper explains physics of the conductor-related signal distortion effects in PCB and packaging interconnects. After reading this paper, you should be able to setup simple experiments in your EDA tool to figure out the limitations and will be sufficiently qualified to ask your EDA tool vendor questions about the accuracy of the conductor modeling effects.

Teledyne LeCroy, a worldwide leader in serial data test solutions has announced the release of the USB Type-C™ Compliance Suite for the Voyager M310C SuperSpeed USB 3.1 protocol verification platform. Based on USB-IF's USB Type-C Functional Verification Specification, this automated test suite allows developers to verify the logical USB Type-C port operation and verify compliance to the verification specification for devices utilizing the USB Type-C interface.

This paper will demonstrate the application of DOE and RSM to a CEI 28G VSR design. We will show the process of creating a DOE, fitting the data to models, determining the goodness and reliability of the fit and then using the model to perform “what if” analysis, optimize design factors and quantify the impact of manufacturing variation.