Featured White Papers

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Failing a MIL-STD-461 compliance test means everything must pause from marketing campaigns to launch planning. Do you head back to the drawing board? Use a filter? If so, should you choose a traditional filter or an EMI filter insert?

Embedded systems, used in applications ranging from toys to advanced aircraft, use microcontrollers to execute specialized operations within a more complex system.

This white paper helps designers understand the cross-fabric thermal and stress challenges introduced by 3D-ICs and how the Cadence® Celsius™ Thermal Solver enables designers to develop strategies to mitigate these impacts.

This white paper highlights the features in Cadence® Sigrity™ X signal and power integrity (SI/PI) solutions for system-level SI and PI analysis. Read on for more.

This white paper highlights the features in Cadence® Sigrity™ X signal and power integrity (SI/PI) solutions for system-level SI and PI analysis.

Phase noise is unintentional phase modulation on a signal that spreads the spectrum and degrades performance in many RF applications.

Rohde & Schwarz has many test instruments and solutions for highspeed digital design including oscilloscopes, spectrum and phase noise analyzers, signal generators, vector network analyzers, and power supplies.

A challenge of high-frequency design is overcoming signal integrity issues, especially with 112G SerDes. For long-reach applications, signal distortion impacts clock recovery and the fidelity of the information being transferred. This white paper looks at how to handle these issues and ensure data is successfully transmitted with low BER.

This eGuide guide shows you how to make accurate power rail measurements and how impedance measurements can help to detect typical root causes of power integrity issues.

This application note provides an introduction to the DDR memory technology and explains common challenges, related to the specific nature of DDR data, command / address and control buses and describes the typical measurements to verify and debug DDR system designs.