Tim Hollis

Tim Hollis received the B.S. degree in Electrical Engineering from the University of Utah, Salt Lake City, UT in 2003 and the Ph.D. in Electrical Engineering from Brigham Young University, Provo, UT in 2007, focusing on channel equalization and jitter attenuation circuits for high-speed serial interconnects. He joined Micron’s Advanced Architecture Group in 2006 and currently serves as the Technical Lead for Micron’s Signal Integrity R&D team, focusing on future I/O development. Dr. Hollis holds 122 issued US and International patents and is a Senior Member of the IEEE.
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16Gb/s and Beyond with Single-Ended I/O in High-Performance Graphics Memory

January 1, 2019
Tim Hollis, Salman Jiva, Martin Brox, Wolfgang Spirkl, Thomas Hein, Dave Ovard, Roy Greeff, Dan Lin, Michael Richter, Peter Mayer, Walt Moden, Maksim Kuzmenka, Mani Balakrishnan, Milena Ivanov, Manfred Plan, Marcos Alvarez Gonzalez, Bryce Gardiner, Dong Soon Lim, and Jörg Weller
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The paper discusses the development of GDDR6 as a lower-risk and more cost-effective solution as compared to other high-bandwidth memory solutions.


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