In the world of power electronics, the focus is on the power supply, and the load is modeled as a simple resistor. In the world of power integrity, the focus is on the decoupling capacitors required for the digital load and the power supply is modeled as a simple resistor in series with an inductor. In the real world, neither assumption solves the problem of simulating the power delivery ecosystem with switching power supply control loops, gigabit switching digital loads, and a PCB network of filtering and decoupling components. The challenge is how to simulate the power integrity ecosystem and include the feedback loop and switching noise of a switch mode power supply (SMPS) without waiting days for the simulation results. 

This paper will show, step-by-step, the process of how to build an actual measurement-based voltage-regulator module (VRM) model based on the Sandler State-Space Average Model (SSAM) in Keysight PathWave ADS. This includes details on the necessary measurements, how to tune the model to get high-fidelity results, and how to troubleshoot your simulation when it doesn’t match your measurement. In addition, this paper demonstrates how, based on the SSAM VRM model, a VRM matches (or correlates) to measurements. Engineers will see in this paper that even the ringing in the simulation is perfectly in line with the measurement. Lastly, as part of this paper, there is an analysis of why you can’t use passive SPICE models for VRMs and how there is over 47 dB greater difference in the noise spectrum when using the SSAM versus a fitted passive SPICE VRM model with PCB effects.

The solution presented here uses control loop theory state space equations to create a behavioral model of an SMPS that allows for fast simulation. This Sandler State Space Average Model previously published has the fidelity to include the dynamic control loop behavior for stability assessment, large signal and small signal noise ripple, and power supply rejection ratio. The model also works with the Non-Invasive Stability Measurement method to assess the control loop phase margin from simple output impedance data. 

The paper referenced here was one of the top 10 most attended papers at DesignCon 2023. To read the entire DesignCon 2023 paper, download the PDF.