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Executive Q&A with Jeff Waters, president and CEO of Isola Group discussing new developments in their facilities, strategy and new products.

In the GB/s regime, accurate modeling of insertion loss and phase delay is a precursor to successful high-speed serial link designs. We propose a causal (physically meaningful) form of the Hammerstad and Cannonball-Huray metal roughness frequency dependent complex correction factor. Compared to the widely used, non-causal form, it considerably increases the inductive component of internal metal impedance. Transmission lines simulated with a causal version demonstrate increased phase delay and characteristic impedance. By obtaining the dielectric and roughness parameters solely from manufacturers' data sheets, we validate the model through a detailed case study to test its accuracy.

In case you could not make it to EDI CON USA or just want a quick review of the event, here is summary of the keynotes, conference sessions and product review.

Ransom Stephens describes himself as physicist, author and technologist. Add life coach to that list, which he aptly played delivering one of the two keynotes at the Electronic Design Innovation Conference (EDI CON) last week in Santa Clara. Titled “Innovation, Incorporation, and Integrity,” Stephens riffed on why we work and not losing sight of our values and calling.

The third Electronic Design Innovation Conference (EDICON), was held Oct 17-18, 2018 in Santa Clara. The attendees were treated to two days of technical talks, tutorials and tradeshow with the overlapping topics of RF, SI, PI and EMI. This is a unique combination, allowing cross fertilization between these otherwise separate fields.

We usually associate problems with the power distribution network (PDN) as from excess VRM noise, or from transient current draw from the core or I/O drivers. But that’s not the only source of PDN noise. Some failures can arise from dull, boring, mundane problems at DC.

This paper focuses on the importance of DCD jitter analysis at higher speed and heavier loading NAND systems, and introduces a statistical approach to DCD jitter analysis.

SIJ talked with Roger Tushingham about how to foster innovation and next-generation circuit materials needs.

Eric Bogatin reviews a presentation by Terence Regan, and shares his thoughts on the topic of high-performance interconnect design and fabrication.

Serial peripheral interface (SPI) is one of the most widely used interfaces between microcontroller and peripheral ICs such as sensors, ADCs, DACs, shift registers, SRAM, and others. This article provides a brief description of the SPI interface followed by an introduction to Analog Devices’ SPI enabled switches and muxes, and how they help reduce the number of digital GPIOs in system board design.